PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 53

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

Access in multiplexed P-interface mode:
CSS
CSM
4.2.2
4.2.2.1 Configurable Interface Mode Register 1 (CMD1)
Access in demultiplexed P-interface mode:
Reset value: 00
CSP1..0
Semiconductor Group
bit 7
CSS
Configurable Interface Registers
Clock Source Selection.
0…PDC and PFS are used as clock and framing source for the CFI. Clock
1…DCL and FSC are selected as clock and framing source for the CFI.
CFI-Synchronization Mode.
The rising FSC edge synchronizes the CFI-frame.
0…FSC is evaluated with every falling edge of DCL.
1…FSC is evaluated with every rising edge of DCL.
Clock Source Prescaler 1,0.
The clock source frequency is divided according to the following table to
obtain the CFI reference clock CRCL.
CSP1,0
00
01
10
11
Note: If CSS = 0 is selected, CSM and PMOD:PSM must be programmed
CSM
and framing signals derived from these sources are output on DCL and
FSC.
H
identical.
CSP1
CSP0
53
CMD1
Prescaler Divisor
2
1.5
1
not allowed
read/write
read/write
Detailed Register Description
CMD0
address: 6
OMDR:RBS = 1
address: 2C
CIS1
PEB 2055
PEF 2055
H
bit 0
H
CIS0