PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 192

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

W:MAAR
W:MACR
W:MADR
W:MAAR
W:MACR
The above programming sequence can for example be performed during the
initialization phase of the EPIC. At this stage the CFI is not operational (OMDR = 80
i.e. the values received at the CFI are ignored.
not initiate a definite change, the values of two consecutive sampling points are
compared with the current old stable value. The stable value is then only updated if both
new values are identical and differ from the old stored value. The stable value can be
read from the odd CM data field location. Each change in the stable value is furthermore
indicated by an ISTA:SFI interrupt and the address of the corresponding odd CM
location is stored in the CIFIFO. Since the MSB of the CIFIFO is set to 1 for a valid entry
(SBV = 1), the value read from the CIFIFO can directly be copied to MAAR in order to
read the upstream CM data field, which also requires an MSB set to 1 (U/D = 1).
Note: The sampling interval is selected in the TIMR register (refer to chapter 5.5.2.1).
Examples
In CFI mode 0 the upstream time slots 6 and 7 of port 2 shall be initialized as MF and
CS channels, 6 bit signaling scheme, the expected value from the codec after power up
shall be “011101”:
W:MADR
Semiconductor Group
If the sampling interval is set to 125 s (TIMR:SSR = 1), it is not necessary to start
the timer to operate the change detection logic. If, however, the last look period is
determined by TIMR:TVAL6 … 0 (TIMR:SSR = 0) it is required to start the timer
(CMDR:ST = 1) to operate the change detection logic and to generate SFI
interrupts.
= 0111 0111
= 1001 1100
= 0111 1010
= 0111 0111
= 1001 1101
= 0111 1010
B
B
B
B
B
B
; expected actual value “011101”
; upstream, port 2, time slot 6
; write CM code + data fields, CM code “1010”
; expected stable value “011101”
; upstream, port 2, time slot 7
; write CM code + data fields, CM code “1010”
192
Application Hints
PEB 2055
PEF 2055
H
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