PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 188

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

5.5.2.1 Registers used in Conjunction with the CS Handler
In detail, the following register bits are used in conjunction with the CS handler:
Signaling FIFO
CIFIFO
The 9 byte deep CIFIFO stores the addresses of CFI time slots in which a C/I and/or a
SIG value change has taken place. This address information can then be used to read
the actual C/I or SIG value from the Control Memory.
SBV:
SAD6 … 0:
Timer Register
TIMR
The EPIC timer can be used for 3 different purposes: timer interrupt generation
(ISTA:TIG), FSC multiframe generation (CMD2:FC2 … 0 = 111), and last look period
generation.
In case of last look period generation, the following functions are provided:
SSR:
Semiconductor Group
bit 7
bit 7
SBV
SSR
Signaling Byte Valid; if SBV = 1, the SAD6 … 0 bits indicate a valid
subscriber address. The polarity of SBV is chosen such that the
whole 8 bits of the CIFIFO can be copied to the MAAR register in
order to read the upstream C/I or SIG value from the Control Memory.
Subscriber Address bits 6 … 0; The CM address which corresponds
to the CFI time slot where a C/I or SIG value change has taken place
is encoded in these bits. For C/I channels SAD6 … 0 point to an even
CM address (C/I value), for SIG channels SAD6 … 0 point to an odd
CM address (stable SIG value).
Signaling Sampling Rate; If SSR = 1, the last look period is fixed to
125 s, i.e. the timer is not used at all for the last look logic. The value
programmed to TVAL has then no influence on the last look period.
The timer can then still be used for timer interrupt generation, and/or
FSC multiframe generation, with a period as defined by TVAL6 … 0.
If SSR = 0, the last look period is defined by TVAL6 … 0. Note that if
the timer is used, it must also be started with CMDR:ST = 1.
TVAL6
SAD6
TVAL5
SAD5
TVAL4
read
SAD4
write
188
TVAL3
SAD3
reset value:
reset value:
TVAL2
SAD2
Application Hints
TVAL1
SAD1
0XXXXXXX
00
PEB 2055
H
PEF 2055
bit 0
bit 0
TVAL0
SAD0
B