PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 151

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

PEB 2055
PEF 2055
Application Hints
5.4
Switched Channels
This chapter treats the switching functions between the CFI and PCM interfaces which
are programmed exclusively in the control memory. The switching functions of channels
which involve the P interface or which are programmed in the synchronous transfer
registers are treated in chapter 5.6 and chapter 5.7.
The EPIC is a non-blocking space and time switch for 128 channels per direction.
Switching is performed between the configurable (CFI) and the PCM interfaces. Both
interfaces provide up to 128 time slots which can be split up into either 4 ports with up to
32 time slots, 2 ports with up to 64 time slots or 1 port with up to 128 time slots. In all of
these cases each port consists of a separate transmit and receive line (duplex ports). On
the CFI side a bidirectional mode is also provided (CFI mode 3) which offers 8 ports with
up to 16 time slots per port. In this case each time slot of each port can individually be
programmed to be either input or output.
The time slot numbering always ranges from 0 to N – 1 (N = number of time slots/frame),
and each time slot always consists of 8 contiguous bits. The bandwidth of a time slot is
therefore always 64 kbit/s.
The EPIC can switch single time slots (64 kbit/s channels), double time slots (128 kbit/s
channels) and also 2 bit and 4 bit wide subtime slots (16 and 32 kbit/s channels). The
bits in a time slot are numbered 7 through 0. On the serial interfaces (PCM and CFI),
bit 7 is the first bit to be transmitted or received, bit 0 the last. If the P has access to the
serial data, bit 7 represents the MSB (D7) and bit 0 the LSB (D0) on the P bus.
The switching of 128 kbit/s channels implies that two consecutive time slots starting with
an even time slot number are used, e.g. PCM time slots 22 and 23 can be switched as
a single 16 bit wide time slot to CFI time slots 4 and 5. Under these conditions it is
guaranteed that the involved time slots are submitted to the same frame delay (also refer
to chapter 5.4.4).
The switching of channels with a data rate of 16 and 32 kbit/s is possible for the following
subtime slot positions within an 8 bit time slot:
Semiconductor Group
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