PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 67

• Manufacturer Part Number: PEF 2054 N V2.1
• Description: IC INTERFACE CTRLR PCM LCC-44
• Manufacturer: Infineon Technologies
• Series: EPICr

Specifications of PEF 2054 N V2.1

• Function: PCM Interface Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 9.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC
• Includes: Board Controller, Channel Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF2054NV2.1XT; PEF2054NV21XK; SP000057916; SP000075438

Access in multiplexed P-interface mode:
Access in multiplexed P-interface mode:
4.2.4
4.2.4.1 Synchronous Transfer Data Register (STDA)
Access in demultiplexed P-interface mode:
Reset value: xx
The STDA register buffers the data transferred over the synchronous transfer channel A.
MTDA7 to MTDA0 hold the bits 7 to 0 of the respective time slot. MTDA7 (MSB) is the
bit transmitted/received first, MTDA0 (LSB) the bit transmitted/received last over the
serial interface.
4.2.4.2 Synchronous Transfer Data Register B (STDB)
Access in demultiplexed P-interface mode:
Reset value: xx
The STDB register buffers the data transferred over the synchronous transfer channel B.
MTDB7 to MTDB0 hold the bits 7 to 0 of the respective time slot. MTDB7 (MSB) is the
bit transmitted/received first, MTDB0 (LSB) the bit transmitted/received last over the
serial interface.
Semiconductor Group
bit 7
bit 7
MTDA7
MTDB7
Synchronous Transfer Registers
MTDA6
MTDB6
H
H
MTDA5
MTDB5
MTDA4
MTDB4
67
MTDA3
MTDB3
read/write
read/write
read/write
read/write
Detailed Register Description
MTDA2
MTDB2
address: 3
address: 4
OMDR:RBS = 0
address: 06
OMDR:RBS = 0
address: 08
MTDA1
MTDB1
PEB 2055
PEF 2055
H
H
bit 0
bit 0
H
H
MTDA0
MTDB0