PEF 2054 N V2.1 Infineon Technologies, PEF 2054 N V2.1 Datasheet - Page 62

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PEF 2054 N V2.1

Manufacturer Part Number
PEF 2054 N V2.1
Description
IC INTERFACE CTRLR PCM LCC-44
Manufacturer
Infineon Technologies
Series
EPICr
Datasheet

Specifications of PEF 2054 N V2.1

Function
PCM Interface Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
9.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC
Includes
Board Controller, Channel Switching
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF2054NV2.1XT
PEF2054NV21XK
SP000057916
SP000075438
Semiconductor Group
1. Writing data to the upstream DM data field (e.g. PCM idle code).
MACR:
MOC3..0 defines the bandwidth and the position of the subchannel as shown below:
Note: When reading a DM data field location, all 8 bits are read regardless of the
2. Writing to the upstream DM code (tristate) field.
MACR:
Note: The tristate field is exchanged with the 4 least significant bits (LSBs) of the MADR.
3. Writing data to the upstream or downstream CM data field (e.g. signaling code).
MACR:
RWS
RWS
RWS
Reading data from the upstream or downstream DM data field.
Control-reading the upstream DM code (tristate).
Reading data from the upstream or downstream CM data field.
bandwidth selected by the MOC bits.
MOC3..0
0000
0001
0011
0010
0111
0110
0101
0100
MOC = 1100
MOC = 1101
MOC3
MOC3
1
MOC2
MOC2
0
Read/write tristate info from/to single PCM time slot
Write tristate info to all PCM time slots
MOC1
MOC1
Transferred Bits
bits 7..0
bits 7..4
bits 3..0
bits 7..6
bits 5..4
bits 3..2
bits 1..0
0
62
MOC0
MOC0
1
Detailed Register Description
0
0
0
Channel Bandwidth
64 kbit/s
32 kbit/s
32 kbit/s
16 kbit/s
16 kbit/s
16 kbit/s
16 kbit/s
0
0
0
PEB 2055
PEF 2055
0
0
0

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