UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 418

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

19.4.4 Nesting interrupt servicing
maskable interrupts). Also, when an interrupt request is acknowledged, interrupt request acknowledge becomes
disabled (IE = 0). Therefore, to enable nesting, it is necessary to set (1) the IE flag with the EI instruction during interrupt
servicing to enable interrupt acknowledge.
Two types of priority control are available: default priority control and programmable priority control. Programmable
priority control is used for nesting.
being serviced is generated, it is acknowledged for nesting. If an interrupt with a priority lower than that of the interrupt
currently being serviced is generated during interrupt servicing, it is not acknowledged for nesting.
pending. When servicing of the current interrupt ends, the pended interrupt request is acknowledged following
execution of at least one main processing instruction execution.
416
Interrupt Being Serviced
Non-maskable interrupt
Maskable interrupt
Software interrupt
Nesting occurs when another interrupt request is acknowledged during execution of an interrupt.
Nesting does not occur unless the interrupt request acknowledge enable state is selected (IE = 1) (except non-
Moreover, even if interrupts are enabled, nesting may not be enabled, this being subject to interrupt priority control.
In the interrupt enable state, if an interrupt request with a priority equal to or higher than that of the interrupt currently
Interrupt requests that are not enabled because of the interrupt disable state or they have a lower priority are held
Nesting is not possible during non-maskable interrupt servicing.
Table 19-4 shows interrupt requests enabled for nesting and Figure 19-13 shows nesting examples.
Remarks 1.
2.
3. ISP and IE are flags contained in the PSW.
4. PR is a flag contained in PR0L, PR0H, and PR1L.
Table 19-4. Interrupt Requests Enabled for Nesting During Interrupt Servicing
ISP = 0: An interrupt with higher priority is being serviced.
ISP = 1: No interrupt request has been acknowledged, or an interrupt with a lower priority is being
IE = 0: Interrupt request acknowledgment is disabled.
IE = 1: Interrupt request acknowledgment is enabled.
PR = 0: Higher priority level
PR = 1: Lower priority level
Nesting Request
: Nesting disabled
: Nesting enabled
serviced.
ISP = 0
ISP = 1
CHAPTER 19 INTERRUPT FUNCTIONS
Interrupt Request
Non-Maskable
User’s Manual U14046EJ5V0UD
IE = 1
PR = 0
Maskable Interrupt Request
IE = 0
IE = 1
PR = 1
IE = 0
Software
Interrupt
Request