UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 402

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

19.1 Interrupt Function Types
(1) Non-maskable interrupt
(2) Maskable interrupts
(3) Software interrupt
19.2 Interrupt Sources and Configuration
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The following three types of interrupt functions are used.
A total of 20 interrupt sources exist among non-maskable, maskable, and software interrupts (see Table 19-1).
Remark A non-maskable interrupt or a maskable interrupt (internal) can be selected as the watchdog timer
This interrupt is acknowledged even in an interrupt disabled state. It does not undergo priority control and is
given top priority over all other interrupt requests. The other interrupt requests are held pending while the non-
maskable interrupt is serviced.
The non-maskable interrupt generates a standby release signal and releases the HALT mode during main system
clock operation.
The non-maskable interrupt has only interrupt request from the watchdog timer.
These interrupts undergo mask control. Maskable interrupts can be divided into a high interrupt priority group
and a low interrupt priority group by setting the priority specification flag registers (PR0L, PR0H, PR1L).
Multiple high priority interrupts can be applied to low priority interrupts. If two or more interrupts with the same
priority are simultaneously generated, each interrupt has a predetermined priority (see Table 19-1).
The maskable interrupt generates a standby release signal and releases the STOP and HALT modes.
Five external interrupt requests and 13 internal interrupt requests are incorporated as maskable interrupts.
This is a vectored interrupt to be generated by executing the BRK instruction. It is acknowledged even in an
interrupt disabled state. The software interrupt does not undergo interrupt priority control.
interrupt (INTWDT).
CHAPTER 19 INTERRUPT FUNCTIONS
User’s Manual U14046EJ5V0UD