UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 172

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

170
Notes 1. Bit 5 is read-only.
Cautions 1. Be sure to clear bit 3 to 0.
Remarks 1. f
Address: FFFBH After reset: 04H
Symbol
PCC
2. When the CPU is operating on the subsystem clock, MCC should be used to stop the main system clock
3. This bit can be set to 1 only when the subsystem clock is not used.
2. f
oscillation. The STOP instruction should not be used.
2. When the external clock is input, MCC should not be set.
X
XT
This is because the X2 pin is connected to V
MCC
MCC
: Main system clock oscillation frequency
FRC
CSS
CLS
<7>
: Subsystem clock oscillation frequency
0
1
0
1
0
1
0
1
Figure 7-2. Format of Processor Clock Control Register (PCC)
Oscillation possible
Oscillation stopped
Internal feedback resistor used
Internal feedback resistor not used
Main system clock
Subsystem clock
PCC2
Other than above
FRC
<6>
0
0
0
0
1
0
0
0
0
1
CHAPTER 7 CLOCK GENERATOR
R/W
PCC1
CLS
<5>
Note 1
0
0
1
1
0
0
0
1
1
0
User’s Manual U14046EJ5V0UD
Subsystem clock feedback resistor selection
Main system clock oscillation control
PCC0
CSS
<4>
0
1
0
1
0
0
1
0
1
0
Note 3
CPU clock status
f
f
f
f
f
f
Setting prohibited
X
X
X
X
XT
X
/2
/2
/2
/2
/2
DD1
2
3
4
3
0
via a pull-up resistor.
CPU clock (f
PCC2
2
Note 2
CPU
) selection
PCC1
1
PCC0
0