UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 187

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

(3) 16-bit timer capture/compare register 01 (CR01)
Cautions 1. Set CR00 to a value other than 0000H in the clear & start mode entered on a match between
• When CR01 is used as a compare register
• When CR01 is used as a capture register
CR00 is set by a 16-bit memory manipulation instruction.
RESET input makes CR00 undefined.
CR01 is a 16-bit register which has the functions of both a capture register and a compare register. Whether it is
used as a capture register or a compare register is set by bit 2 (CRC02) of capture/compare control register 0 (CRC0).
The value set in CR01 is constantly compared with the 16-bit timer counter 0 (TM0) count value, and an interrupt
request (INTTM01) is generated if they match.
It is possible to select the valid edge of the TI00 pin as the capture trigger. The TI00 valid edge is set by means
of prescaler mode register 0 (PRM0) (see Table 8-3).
Remarks 1. Setting ES01, ES00 = 1, 0 is prohibited.
Falling edge
Rising edge
Both rising and falling edges
2. If the new value of CR00 is less than the value of 16-bit timer counter 0 (TM0), TM0 continues
3. When P70 is used as the input pin for the valid edge of TI00, it cannot be used as a timer
CR01 Capture Trigger
Table 8-3. CR01 Capture Trigger and Valid Edge of TI00 Pin (CRC02 = 1)
2. ES01, ES00: Bits 5 and 4 of prescaler mode register 0 (PRM0)
TM0 and CR00. However, in the free-running mode and in the clear mode using the valid
edge of TI00, if CR00 is cleared to 0000H, an interrupt request (INTTM00) is generated when
CR00 changes from 0000H to 0001H following overflow (FFFFH).
counting, overflows, and then starts counting from 0 again. If the new value of CR00 is less
than the old value, therefore, the timer must be reset to be restarted after the value of CR00
is changed.
output (TO0). Moreover, when P70 is used as TO0, it cannot be used as the input pin for
the valid edge of TI00.
CRC02:
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
Bit 2 of capture/compare control register 0 (CRC0)
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U14046EJ5V0UD
TI00 Pin Valid Edge
ES01
0
0
1
ES00
0
1
1
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