UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 16

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

CHAPTER 6 PORT FUNCTIONS ...................................................................................................... 134
CHAPTER 7 CLOCK GENERATOR ................................................................................................. 167
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0 .......................................................................... 182
14
5.4
6.1
6.2
6.3
6.4
6.5
7.1
7.2
7.3
7.4
7.5
7.6
8.1
8.2
Operand Address Addressing ............................................................................................. 125
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.4.9
Port Functions ....................................................................................................................... 134
Port Configuration ................................................................................................................ 137
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
Port Function Control Registers ......................................................................................... 159
Port Function Operations ..................................................................................................... 165
6.4.1
6.4.2
6.4.3
Selection of Mask Option ..................................................................................................... 166
Clock Generator Functions .................................................................................................. 167
Clock Generator Configuration ........................................................................................... 167
Clock Generator Control Registers ..................................................................................... 169
System Clock Oscillator ....................................................................................................... 173
7.4.1
7.4.2
7.4.3
Clock Generator Operations ................................................................................................ 178
7.5.1
7.5.2
Changing System Clock and CPU Clock Settings ............................................................. 180
7.6.1
7.6.2
Functions of 16-Bit Timer/Event Counter 0 ........................................................................ 182
Configuration of 16-Bit Timer/Event Counter 0 .................................................................. 183
Implied addressing ..................................................................................................................... 125
Register addressing ................................................................................................................... 126
Direct addressing ....................................................................................................................... 127
Short direct addressing .............................................................................................................. 128
Special function register (SFR) addressing ................................................................................ 129
Register indirect addressing ....................................................................................................... 130
Based addressing ...................................................................................................................... 131
Based indexed addressing ......................................................................................................... 132
Stack addressing ........................................................................................................................ 133
Port 0 .......................................................................................................................................... 137
Port 1 .......................................................................................................................................... 139
Port 2 .......................................................................................................................................... 140
Port 3 ( PD780024A, 780034A Subseries) ............................................................................... 143
Port 3 ( PD780024AY, 780034AY Subseries) ............................................................................ 148
Port 4 .......................................................................................................................................... 152
Port 5 .......................................................................................................................................... 153
Port 6 .......................................................................................................................................... 154
Port 7 .......................................................................................................................................... 156
Writing to I/O port ....................................................................................................................... 165
Reading from I/O port ................................................................................................................ 165
Operations on I/O port ............................................................................................................... 165
Main system clock oscillator ....................................................................................................... 173
Subsystem clock oscillator ......................................................................................................... 174
When subsystem clock is not used ............................................................................................ 177
Main system clock operations .................................................................................................... 179
Subsystem clock operations ...................................................................................................... 180
Time required for switchover between system clock and CPU clock ......................................... 180
System clock and CPU clock switching procedure .................................................................... 181
User’s Manual U14046EJ5V0UD