UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 182

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

7.5.2 Subsystem clock operations
1), the following operations are carried out.
(a) The minimum instruction execution time remains constant (122 s @ 32.768 kHz operation) irrespective of bits
(b) Watchdog timer counting stops.
7.6 Changing System Clock and CPU Clock Settings
7.6.1 Time required for switchover between system clock and CPU clock
of the processor clock control register (PCC).
switchover clock for several instructions (see Table 7-3).
by bit 5 (CLS) of the PCC register.
180
CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0 CSS PCC2 PCC1 PCC0
Set Value Before
0
1
When operating with the subsystem clock (with bit 5 (CLS) of the processor clock control register (PCC) set to
Caution
The system clock and CPU clock can be switched over by means of bits 0 to 2 (PCC0 to PCC2) and bit 4 (CSS)
The actual switchover operation is not performed directly after writing to the PCC; operation continues on the pre-
Determination as to whether the system is operating on the main system clock or the subsystem clock is performed
Remark One instruction is the minimum instruction execution time with the pre-switchover CPU clock.
Caution
Switchover
0 to 2 (PCC0 to PCC2) of PCC.
0
0
0
0
1
0
0
1
1
0
Do not execute the STOP instruction while the subsystem clock is in operation.
Selection of the CPU clock cycle division ratio (PCC0 to PCC2) and switchover from the main
Simultaneous setting is possible, however, for selection of the CPU clock cycle division ratio
system clock to the subsystem clock (changing CSS from 0 to 1) should not be set simultaneously.
(PCC0 to PCC2) and switch over from the subsystem clock to the main system clock (changing
CSS from 1 to 0).
0
1
0
1
0
0
8 instructions
4 instructions
2 instructions
1 instruction
1 instruction
Table 7-3. Maximum Time Required for CPU Clock Switchover
0
0
0
0
16 instructions
4 instructions
2 instructions
1 instruction
1 instruction
CHAPTER 7 CLOCK GENERATOR
0
User’s Manual U14046EJ5V0UD
0
1
0
16 instructions
8 instructions
2 instructions
1 instruction
1 instruction
Set Value After Switchover
0
1
0
0
16 instructions
8 instructions
4 instructions
1 instruction
1 instruction
0
1
1
0
16 instructions
8 instructions
4 instructions
2 instructions
1 instruction
1
0
0
f
f
f
f
f
X
X
1
X
X
X
/16f
/32f
/2f
/4f
/8f
XT
XT
XT
XT
XT
instruction
instruction
instruction
instruction
instruction