UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 127

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

5.4 Operand Address Addressing
manipulation during instruction execution.
5.4.1 Implied addressing
The following various methods are available to specify the register and memory (addressing) which undergo
[Function]
[Operand format]
[Description example]
The register which functions as an accumulator (A and AX) in the general-purpose register is automatically
(implicitly) addressed.
Of the PD780024A, 780034A, 780024AY, 780034AY Subseries instruction words, the following instructions
employ implied addressing.
Because implied addressing can be automatically employed with an instruction, no particular operand format is
necessary.
In the case of MULU X
With an 8-bit
the A and AX registers are specified by implied addressing.
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
8-bit multiply instruction, the product of A register and X register is stored in AX. In this example,
A register for multiplicand and AX register for product storage
AX register for dividend and quotient storage
A register for storage of numeric values which become decimal correction targets
A register for storage of digit data which undergoes digit rotation
CHAPTER 5 CPU ARCHITECTURE
Register to Be Specified by Implied Addressing
User’s Manual U14046EJ5V0UD
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