UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 361

• Manufacturer Part Number: UPD78F0034BGC-8BS-A
• Description: MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0034BGC-8BS-A

• Package: 64LQFP
• Family Name: 78K0
• Maximum Speed: 12 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 51
• Interface Type: 3-Wire/UART
• On-chip Adc: 8-chx10-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

shift register 0 (IIC0), and the transmitting side cancels the wait status when data is written to IIC0.
Transfer lines
Master
Remark
A wait may be automatically generated depending on the setting of bit 3 (WTIM0) of IIC control register 0 (IICC0).
Normally, the receiving side cancels the wait status when bit 5 (WREL0) is set to 1 or when FFH is written to IIC
The master device can also cancel the wait status via either of the following methods.
• By setting bit 1 (STT0) of IICC0 to 1
• By setting bit 0 (SPT0) of IICC0 to 1
Slave
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780024AY, 780034AY SUBSERIES ONLY)
ACKE0: Bit 2 of IIC control register 0 (IICC0)
WREL0: Bit 5 of IIC control register 0 (IICC0)
ACKE0
SDA0
SCL0
SCL0
SCL0
IIC0
IIC0
(2) When master and slave devices both have a nine-clock wait
H
Output according to previously set ACKE0 value
(master transmits, slave receives, and ACKE0 = 1)
D2
6
6
D1
7
7
Master and slave both wait
after output of ninth clock
Figure 18-16. Wait Signal (2/2)
D0
8
8
User’s Manual U14046EJ5V0UD
ACK
Wait signal from
master and slave
9
9
IIC0 data write (cancel wait)
1
Wait signal
from slave
D7
1
FFH is written to IIC0 or WREL0 is set to 1
D6
2
2
D5
3
3
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