UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 203

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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(3) Pulse width measurement with free-running counter and two capture registers
Figure 8-19. Control Register Settings for Pulse Width Measurement with Free-Running Counter and
Caution
When 16-bit timer counter 0 (TM0) is operated in free-running mode (see register settings in Figure 8-19), it is
possible to measure the pulse width of the signal input to the TI00 pin.
When the edge specified by bits 4 and 5 (ES00 and ES01) of prescaler mode register 0 (PRM0) is input to the
TI00 pin, the value of TM0 is taken into 16-bit timer capture/compare register 01 (CR01) and an interrupt request
signal (INTTM01) is set.
Also, when the inverse edge to that of the capture operation to CR01 is input, the value of TM0 is taken into 16-
bit timer capture/compare register 00 (CR00).
Either of two edges can be selected—rising or falling—as the valid edges for the TI00 pin specified by bits 4 and
5 (ES00 and ES01) of prescaler mode register 0 (PRM0).
Sampling is performed at the interval selected by prescaler mode register 0 (PRM0), and a capture operation
is only performed when a valid level of the TI00 pin is detected twice, thus eliminating noise with a short pulse
width.
TMC0
CRC0
If the valid edge of TI00 is specified to be both the rising and falling edges, 16-bit timer capture/
compare register 00 (CR00) cannot perform the capture operation.
Two Capture Registers
0
0
0
0
0
0
(a) 16-bit timer mode control register 0 (TMC0)
(b) Capture/compare control register 0 (CRC0)
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
0
0
TMC03
0
0
User’s Manual U14046EJ5V0UD
TMC02
CRC02
1
1
CRC01
0
1
CRC00
OVF0
0
1
Free-running mode
CR00 used as capture register
Captures to CR00 at edge reverse
to valid edge of TI00.
CR01 used as capture register
201

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