UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 207

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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8.4.5 PPG output operation
Figure 8-25 allows operation as PPG (Programmable Pulse Generator) output.
correspond to the count values set beforehand in 16-bit timer capture/compare register 01 (CR01) and in 16-bit timer
capture/compare register 00 (CR00), respectively.
TMC0
CRC0
TOC0
Setting 16-bit timer mode control register 0 (TMC0) and capture/compare control register 0 (CRC0) as shown in
In the PPG output operation, square waves are output from the TO0 pin with the pulse width and the cycle that
Cautions 1. CR00 and CR01 values in the following range should be set to:
Remark
0
0
0
2. The cycle of the pulse generated via PPG output (CR00 setting value + 1) has a duty of (CR01
: Don’t care
0
0
0
0000H < CR01 < CR00
setting value + 1)/(CR00 setting value + 1).
0
0
0
Figure 8-25. Control Register Settings for PPG Output Operation
TOC04
0
0
1
(c) 16-bit timer output control register 0 (TOC0)
(a) 16-bit timer mode control register 0 (TMC0)
TMC03
(b) Capture/compare control register 0 (CRC0)
LVS0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER 0
0/1
1
0
TMC02
CRC02
LVR0
0/1
1
0
FFFFH
TOC01
User’s Manual U14046EJ5V0UD
CRC01 CRC00
0
1
OVF0
TOE0
0
0
1
Clears and starts on match between TM0 and CR00.
CR00 used as compare register
CR01 used as compare register
Enables TO0 output
Reverses output on match between TM0 and CR00
Specifies initial value of TO0 output F/F
Reverse output on match between TM0 and CR01
205

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