HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 739

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

The JTAG (Joint Test Action Group) is standardized as an international standard, IEEE Standard
1149.1, and is open to the public as IEEE Standard Test Access Port and Boundary-Scan
Architecture. Although the name of the function is boundary scan and the name of the group who
worked on standardization is the JTAG, the JTAG is commonly used as the name of a boundary
scan architecture and a serial interface to access the devices having the architecture.
This LSI has a boundary scan function (JTAG). Using this function along with other LSIs
facilitates testing a printed-circuit board.
21.1
• Five test pins (ETCK, ETDI, ETDO, ETMS, and ETRST)
• TAP controller
• Six instructions
HUDS000A_000120020900
BYPASS mode
EXTEST mode
SAMPLE/PRELOAD mode
CLAMP mode
HIGHZ mode
IDCODE mode
(These instructions are test modes corresponding to IEEE 1149.1.)
Features
Section 21 Boundary Scan (JTAG)
Rev. 3.00, 03/04, page 697 of 830