HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 41

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Table 16.7
Table 16.8
Table 16.9
Table 16.10
Table 16.11
Table 16.12
Table 16.13
Section 17 D/A Converter
Table 17.1
Table 17.2
Section 18 A/D Converter
Table 18.1
Table 18.2
Table 18.3
Table 18.4
Section20 Flash Memory (0.18-µm F-ZTAT Version)
Table 20.1
Table 20.2
Table 20.3
Table 20.4
Table 20.5
Table 20.6
Table 20.7
Table 20.8 (1)
Table 20.8 (2)
Table 20.8 (3)
Table 20.8 (4)
Table 20.9
Table 20.10
Table 20.11
Table 20.12
Table 20.13
Table 20.14
Section 21 Boundary Scan (JTAG)
Table 21.1
Table 21.2
Table 21.3
Section 22 Clock Pulse Generator
Table 22.1
Table 22.2
Table 22.3
Fast A20 Gate Output Signals............................................................................... 576
Scope of LPC Interface Pin Shutdown ................................................................. 578
Scope of Initialization in Each LPC Interface Mode ............................................ 579
Pin Configuration.................................................................................................. 590
D/A Channel Enable ............................................................................................. 592
Pin Configuration.................................................................................................. 597
Analog Input Channels and Corresponding ADDR Registers .............................. 598
A/D Conversion Time (Single Mode)................................................................... 603
A/D Converter Interrupt Source............................................................................ 604
Comparison of Programming Modes.................................................................... 614
Pin Configuration.................................................................................................. 620
Register/Parameter and Target Mode ................................................................... 621
Parameters and Target Modes............................................................................... 629
Setting On-Board Programming Mode ................................................................. 638
System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI......... 640
Executable MAT................................................................................................... 656
Hardware Protection ............................................................................................. 665
Pin Configuration.................................................................................................. 699
JTAG Register Serial Transfer.............................................................................. 700
Correspondence between Pins and Boundary Scan Register ................................ 704
Damping Resistance Values ................................................................................. 722
Crystal Resonator Parameters ............................................................................... 723
PFSEL and Multipliers ......................................................................................... 724
Serial Interrupt Transfer Cycle Frame Configuration ....................................... 582
Receive Complete Interrupts and Error Interrupt.............................................. 584
HIRQ Setting and Clearing Conditions............................................................. 585
Host Addresses Example .................................................................................. 588
Software Protection........................................................................................... 666
Inquiry and Selection Commands ..................................................................... 674
Programming/Erasing Command...................................................................... 685
Status Code ....................................................................................................... 694
Error Code ........................................................................................................ 694
Useable Area for Programming in User Program Mode............................... 657
Useable Area for Erasure in User Program Mode......................................... 659
Useable Area for Programming in User Boot Mode..................................... 661
Useable Area for Erasure in User Boot Mode............................................... 663
Rev. 3.00, 03/04, page xxxix of xl