HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 268

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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8.10
Port A is an 8-bit I/O port. Port A pins also function as the address output, event counter input,
keyboard input, and SCI_0 and SCI_2 external control pins. Pin functions are switched depending
on the operating mode. Port A has the following registers. PADDR and PAPIN have the same
address.
• Port A data direction register (PADDR)
• Port A output data register (PAODR)
• Port A input data register (PAPIN)
8.10.1
The individual bits of PADDR specify input or output for the pins of port A.
Rev. 3.00, 03/04, page 226 of 830
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7DDR
PA6DDR
PA5DDR
PA4DDR
PA3DDR
PA2DDR
PA1DDR
PA0DDR
Port A
Port A Data Direction Register (PADDR)
Initial Value
0
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
In normal extended mode:
The corresponding port A pins are address output
ports when the PADDR bits are set to 1, and input
ports when cleared to 0. Pins function as the address
output port depending on the setting of bits IOSE,
CS256E, CPCSE, ADFULLE in bus controller.
In other mode:
The corresponding port A pins are output ports when
the PADDR bits are set to 1, and input ports when
cleared to 0.

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