HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 576

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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Note:
• STR3
Rev. 3.00, 03/04, page 534 of 830
Bit
0
Bit
7
6
5
4
3
2
(When TWRE = 0 and SELSTR3 = 1)
Bit Name Initial Value Slave Host Description
OBF3A
Bit Name Initial Value Slave Host Description
DBU37
DBU36
DBU35
DBU34
C/D3
DBU32
*
Only 0 can be written to clear the flag.
0
All 0
0
0
R/(W)* R
R/W
R
R/W
R/W
R/W
R
R
R
Defined by User
The user can use these bits as necessary.
Command/Data
When the host processor writes to an IDR3 register,
bit 2 of the I/O address is written into this bit to
indicate whether IDR3 contains data or a command.
0: Content of input data register (IDR3) is data
1: Content of input data register (IDR3) is a command
Defined by User
The user can use this bit as necessary.
Output Data Register Full
Indicates whether or not there is transmit data in
ODR3.
0: There is not transmit data in ODR3
[Clearing condition]
When the host processor reads ODR3 using I/O
read cycle, or the slave processor writes 0 to the
OBF3A bit
1: There is transmit data in ODR3
[Setting condition]
When the slave processor writes to ODR3

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