HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 362

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

12.3.9
TISR selects a signal source of external clock/reset input for the counter.
12.3.10 Timer Connection Register I (TCONRI)
TCONRI controls TMR_X input capture.
Rev. 3.00, 03/04, page 320 of 830
Bit
7 to 1
0
Bit
7 to 5
4
3 to 0
Timer Input Select Register (TISR)
Bit Name


Bit Name Initial Value R/W
ICST

IS
All 1
0
Initial Value
All 0
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
The initial values should not be modified.
Input Select
Selects TMIY or ExTMIY as the signal source of
external clock/reset input for the TMR_Y counter.
When external reset input is selected for the CCLR0
and CCLR1 in TCR_Y or external clock is selected
for the CKS2 to CKS0 in TCR_Y, set this bit to1.
0: TMIY or ExTMIY (TMCIY/TMRIY) is not selected
1: TMIY or ExTMIY (TMCIY/TMRIY) is selected
Description
Reserved
The initial values should not be modified.
Input Capture Start Bit
TMR_X has input capture registers (TICR,
TICRR, and TICRF). TICRR and TICRF can
measure the width of a pulse by means of a
single capture operation under the control of the
ICST bit. When a rising edge followed by a falling
edge is detected on TMRIX after the ICST bit is
set to 1, the contents of TCNT at those points are
captured into TICRR and TICRF, respectively,
and the ICST bit is cleared to 0.
[Clearing condition]
When a rising edge followed by a falling edge is
detected on TMRIX
[Setting condition]
When 1 is written in ICST after reading ICST = 0
Reserved
The initial values should not be modified.