HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 418
HD64F2168VTE33
Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F2168VTE33.pdf
(876 pages)
Specifications of HD64F2168VTE33
Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
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14.3.11 Serial Enhanced Mode Register_0 and 2 (SEMR_0 and SEMR_2)
SEMR_0 and SEMR_2 select the SCI_0 and SCI_2 functions, respectively, and the clock source
in asynchronous mode. The basic clock is automatically specified when the average transfer rate
operation is selected.
Rev. 3.00, 03/04, page 376 of 830
Bit
7
6, 5
3
Bit Name
SSE
ABCS
Initial Value
0
All 0
0
R
R/W Description
R/W SCI Select Enable
R/W Asynchronous Mode Basic Clock Select
Enables/disables the external pins to select the SCI
functions when the external clock is supplied in clock
synchronous mode.
0: Disables the external pins to select the SCI functions
1: Enables the external pins to select the SCI functions
•
SSE0I pin input = 0 (selected state): SCI_0 operates
normally
SSE0I pin input = 1 (non-selected state): SCI_0 halts
operation
(TxD0 = high-impedance state, SCK0 = fixed to high)
•
SSE2I pin input = 0 (selected state): SCI_2 operates
normally
SSE2I pin input = 1 (non-selected state): SCI_2 halts
operation
(TxD2 = high-impedance state, SCK2 = fixed to high)
Reserved
These bits are always read as 0 and cannot be
modified.
Specifies the basic clock for a 1-bit cycle in
asynchronous mode.
This bit is valid only in asynchronous mode (C/A bit in
SMR is 0).
0: The basic clock has a frequency 16 times the transfer
1: The basic clock has a frequency 8 times the transfer
(normal)
clock frequency (normal operation)
clock frequency (double-speed operation)
SCI_0
SCI_2
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