HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 625

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

clock must first be issued to the host. For details see section 16.4.8, LPC Interface Clock Start
Request.
16.4.8
A request to restart the clock (LCLK) can be sent to the host processor by means of the CLKRUN
pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested
since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host
interrupt request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is
sent to the host. The timing for this operation is shown in figure 16.11.
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
CLK
CLKRUN
LPC Interface Clock Start Request
Pull-up enable
Drive by the slave processor
Figure 16.11 Clock Start or Speed-Up
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2
Drive by the host processor
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