PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 96

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.5.29
PERICOM SEMICONDUCTOR - Confidential
ARBITER MODE REGISTER – OFFSET 48h
Bit
8
Bit
9
10
11
19:12
20
21
Function
Enable Arbiter 8
Function
External Arbiter Bit
Broken Master
Timeout Enable
Broken Master
Refresh Enable
Arbiter Fairness
Counter
GNT_L Output
Toggling Enable
Reserved
Type
Type
RW
RW
RW
RW
RW
RO
RO
Page 96 of 165
Description
0: Disable arbitration for master 8
1: Enable arbitration for master 8
Reset to 1
Description
0: Enable internal arbiter (if CFN_L is tied LOW)
1: Use external arbiter (if CFN_L is tied HIGH)
Reset to 0/1 according to what CFN_L is tied to
0: Broken master timeout disable
1: This bit enables the internal arbiter to count 16 PCI bus cycles while waiting
for FRAME_L to become active when a device’s PCI bus GNT_L is active and
the PCI bus is idle. If the broken master timeout expires, the PCI bus GNT for
the device is de-asserted.
Reset to 0
0: A broken master will be ignored forever after de-asserting its REQ_L for at
least 1 clock
1: Refresh broken master state after all the other masters have been served once
Reset to 0
08h: These bits are the initialization value of a counter used by the internal
arbiter. It controls the number of PCI bus cycles that the arbiter holds a
device’s PCI bus GNT active after detecting a PCI bus REQ_L from another
device. The counter is reloaded whenever a new PCI bus GNT is asserted. For
every new PCI bus GNT, the counter is armed to decrement when it detects the
new fall of FRAME_L. If the arbiter fairness counter is set to 00h, the arbiter
will not remove a device’s PCI bus GNT until the device has de-asserted its
PCI bus REQ.
Reset to 08h
0: GNT_L not de-asserted after granted master assert FRAME_L
1: GNT_L de-asserts for 1 clock after 2 clocks of the granted master asserting
FRAME_L
Reset to 0
Reset to 0
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130