PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 27

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5 TRANSPARENT AND NON-TRANSPARENT BRIDGING
5.1 TRANSPARENT MODE
5.2 NON-TRANSPARENT MODE
PERICOM SEMICONDUCTOR - Confidential
Figure 4-7 Reverse and Transparent Mode
In transparent bridge mode, base class code of PI7C9X130 is set to be 06h (bridge device). The sub-
class code is set to be 04h (PCI-to-PCI bridge). Programming interface is 00h. Hence, PI7C9X130 is
not a subtractive decoding bridge.
PI7C9X130 has type-1 configuration header if TM0 is set to 0 (transparent bridge mode). These
configuration registers are the same as traditional transparent PCI-to-PCI Bridge. In fact, it is backward
compatible to the software that supporting traditional transparent PCI-to-PCI bridges. Configuration
registers can be accessed from several different ways. For PCI Express access, PCI Express
configuration transaction is in forward bridge mode. For PCI access, PCI configuration cycle is mainly
in reverse bridge mode. However, PI7C9X130 allows PCI configuration access in forward mode as
secondary bus configuration access. For I2C access, I2C bus protocol is used with EEPROM selected
(TM1=0). For SM bus access, SM bus protocol is used with SM bus selected (TM1=1).
In non-transparent bridge mode, base class code of PI7C9X130 is set to be 06h (bridge device). The
sub-class code is set to be 80h (other bridge). Programming interface is 00h. Hence, PI7C9X130 is
not a subtractive decoding bridge.
PI7C9X130 has type-0 configuration header if TM0 is set to 1 (non-transparent mode). The
configuration registers are similar to a traditional PCI device. However, there is one set of
configuration registers for the primary interface and another set of configuration registers for the
Memory
System
X4 PCIe link
Chipset
Processor
Host
Page 27 of 165
Gigabit
Ethernet
PCI-X 64-bit,
133 MHz
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130