PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 140

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.6.22
7.6.23
7.6.24
7.6.25
PERICOM SEMICONDUCTOR - Confidential
PRIMARY CLEAR IRQ MASK REGISTER - OFFSET 078h
SECONDARY CLEAR IRQ MASK REGISTER - OFFSET 078h
PRIMARY SET IRQ MASK REGISTER - OFFSET 07Ch
SECONDARY SET IRQ MASK REGISTER - OFFSET 07Ch
Bit
15:0
Bit
31:16
Bit
15:0
Bit
31:16
Function
Primary Clear IRQ
Mask
Function
Secondary Clear
IRQ Mask
Function
Primary Set IRQ
Mask
Function
Secondary Set IRQ
Mask
Type
Type
Type
Type
RWC
RWS
RWS
RWS
Page 140 of 165
Description
When writing “1” to this register bit, it clears the correspondent interrupt
request mask bit.
When reading this register, it returns the primary Clear IRQ Mask bit status:
0: It allows to clear an interrupt request on primary interface
1: It does not allow to clear any interrupt request on primary interface
Reset to FFFFh
Description
When writing “1” to this register bit, it clears the correspondent interrupt
request mask bit.
When reading this register, it returns the Secondary Clear IRQ Mask bit status:
0: It allows to clear an interrupt request on secondary interface
1: It does not allow to clear any interrupt request on secondary interface
Reset to FFFFh
Description
When writing “1” to this register bit, it set the correspondent interrupt request
mask bit.
When reading this register, it returns the Primary Set IRQ Mask bit status:
0: It allows to set an interrupt request on primary interface
1: It does not allow to set any interrupt request on primary interface
Reset to FFFFh
Description
When writing “1” to this register bit, it set the correspondent interrupt request
mask bit.
When reading this register, it returns the Secondary Set IRQ Mask bit status:
0: It allows to set an interrupt request on secondary interface
1: It does not allow to set any interrupt request on secondary interface
Reset to FFFFh
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130