PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 138

IC PCIE-PCIX BRIDGE 1PORT 256BGA

PI7C9X130DNDE

Manufacturer Part Number
PI7C9X130DNDE
Description
IC PCIE-PCIX BRIDGE 1PORT 256BGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X130DNDE

Applications
PCI-to-PCI Bridge
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
1.8V, 3.3V
Package / Case
256-PBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
PI7C9X130DNDE
Manufacturer:
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7.6.14
7.6.15
7.6.16
7.6.17
PERICOM SEMICONDUCTOR - Confidential
UPSTREAM PAGE BOUNDARY IRQ 1 REQUEST REGISTER - OFFSET 05Ch
UPSTREAM PAGE BOUNDARY IRQ 0 MASK REGISTER - OFFSET 060h
UPSTREAM PAGE BOUNDARY IRQ 1 MASK REGISTER - OFFSET 064h
RESERVED REGISTER – OFFSET 068C
Bit
31:0
Bit
31:0
Bit
31:0
Function
Upstream Page
Boundary IRQ 1
Function
Upstream Page
Boundary IRQ 0
Mask
Function
Upstream Page
Boundary IRQ 1
Mask
Type
Type
Type
RWC
RWC
RWC
Page 138 of 165
Description
Each interrupt request bit is correspondent to a page entry in the lower half of
the Upstream Memory 2 range. Bit [0] is for the 33
the 64
transfers data to or from the initiator that addresses the last Double Word in a
page. PI7C9X130 initiates an interrupt request on secondary interface when
the interrupt request bit is set and the corresponding Upstream Page Boundary
IRQ 1 Mask bit is reset. When forward bridge, PI7C9X130 asserts INTA_L or
generates MSI on secondary bus (PCI interface). When reverse bridge,
PI7C9X130 sends INTA_L assertion message or generates MSI on secondary
interface (PCI Express).
When wrting a “1” to this register, it clears the corresponding interrupt request
bit.
Reset to 0
Description
0: PI7C9X130 can initiate an interrupt request when the correspondent request
bit is set
1: PI7C9X130 cannot initiate any interrupt request even though the
correspondent request bit is set
Reset to FFFFFFFFh
Description
0: PI7C9X130 can initiate an interrupt request when the correspondent request
bit is set
1: PI7C9X130 cannot initiate any interrupt request even though the
correspondent request bit is set
Reset to FFFFFFFFh
th
page. PI7C9X130 sets the appropriate bit when it successfully
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
rd
page, and bit [31] is for
PI7C9X130

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