PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 33

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PERICOM SEMICONDUCTOR - Confidential
Primary Bus
Configuration
Access for both
Transparent and
Non-transparent
mode or
Secondary Bus
Configuration
Access for
Transparent
Mode
34h
37h – 35h
3Bh – 38h
3Ch
3Dh
3Eh
3Fh
41h – 40h
43h – 42h
45h – 44h
47h – 46h
4Bh – 48h
4Ch
4Dh
4Eh
4Fh
53h – 50h
57h – 54h
5Bh – 58h
5Fh – 5Ch
63h – 60h
67h – 64h
69h – 68h
6Ah
6Bh
6Dh – 6Ch
Secondary
Bus
Configuration
Access for
Non-
Transparent
Mode only
34h
37h – 35h
3Bh – 38h
7Ch
7Dh
7Eh
7Fh
41h – 40h
43h – 42h
05h – 04h
07h – 06h
4Bh – 48h
0Ch
0Dh
0Eh
0Fh
13h – 10h
17h – 14h
1Bh – 18h
1Fh – 1Ch
23h – 20h
27h – 24h
69h – 68h
6Ah
6Bh
6Dh – 6Ch
Page 33 of 165
Transparent
Mode (type1)
Capability
Pointer
Reserved
Reserved
Interrupt Line
Interrupt Pin
Bridge Control
Bridge Control
PCI Data
Buffering
Control
Chip Control 0
Reserved
Reserved
Arbiter Mode,
Enable, Priority
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PCI Express Tx
and Rx Control
Reserved
Reserved
Reserved
Non-
Transparent
Mode
(Type0)
Capability
Pointer
Reserved
Reserved
Primary
Interrupt Line
Primary
Interrupt Pin
Primary
Min_Gnt
Primary
Max_Lat
PCI Data
Buffering
Control
Chip Control 0
Secondary
Command
Register
Secondary
Status Register
Arbiter Mode,
Enable, Priority
Secondary
Cacheline Size
Register
Secondary
Status Register
Header Type
Reserved
Secondary CSR
and Memory 0
BAR
Secondary CSR
I/O BAR
Upstream I/O or
Memory 1 BAR
Upstream
Memory 2 BAR
Upstream
Memory 3 BAR
Upstream
Memory 3
Upper 32-bit
BAR
PCI Express Tx
and Rx Control
Memory
Address
Forwarding
Control
Reserved
Subsystem
PCI EXPRESS TO PCI-X BRIDGE
(I2C) Access
EEPROM
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Mar 2010 - Rev 2.0
-
3
3
3
2
SM Bus
Access
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
-
PI7C9X130
3
3
3
5