PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 44

• Manufacturer Part Number: PI7C9X130DNDE
• Description: IC PCIE-PCIX BRIDGE 1PORT 256BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X130DNDE

• Applications: PCI-to-PCI Bridge
• Interface: SMBus (2-Wire/I²C)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.4.16 I/O LIMIT REGISTER – OFFSET 1Ch
7.4.17 SECONDARY STATUS REGISTER – OFFSET 1Ch
PERICOM SEMICONDUCTOR - Confidential
Bit
7:4
Bit
9:8
11:10
15:12
Bit
20:16
21
22
23
24
26:25
27
Function
I/O Base
Function
32-bit I/O
Addressing Support
Reserved
I/O Base
Function
Reserved
66MHz Capable
Reserved
Fast Back-to-Back
Capable
Master Data Parity
Error Detected
DEVSEL_L Timing
(medium decoding)
Signaled Target
Abort
Type
Type
Type
RWC
RWC
RW
RW
RO
RO
RO
RO
RO
RO
RO
Page 44 of 165
Description
Indicates the I/O Base (0000_0000h)
Reset to 0000
Description
01: Indicates PI7C9X130 supports 32-bit I/O addressing
Reset to 01
Reset to 00
Indicates the I/O Limit (0000_0FFFh)
Reset to 0000
Description
Reset to 00000
Indicates PI7C9X130 is 66MHz capable
Reset to 1
Reset to 0
FORWARD BRIDGE: reset to 1 when secondary bus is in PCI mode (supports
fast back-to-back transactions) or reset to 0 when secondary bus is in PCI-X
mode (does not support fast back-to-back transactions)
REVERSE BRIDGE: reset to 0 (does not support fast back-to-back
transactions)
This bit is set if its parity error enable bit is set and either of the conditions
occur on the primary:
FORWARD BRIDGE –



REVERSE BRIDGE –


Reset to 0
These bits apply to forward bridge only.
01: medium DEVSEL_L decoding
Reset to 01 when forward mode or 00 when reverse mode.
FORWARD BRIDGE –
Bit is set when PI7C9X130 signals target abort
REVERSE BRIDGE –
Bit is set when PI7C9X130 completes a request using completer abort
completion status
Reset to 0
Detected parity error when receiving data or split response for read
Observes S_PERR_L asserted when sending data or receiving split
response for write
Receives a split completion message indicating data parity error occurred
for non-posted write
Receives a completion marked poisoned
Poisons a write request
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130