PI7C9X130DNDE Pericom Semiconductor, PI7C9X130DNDE Datasheet - Page 45

IC PCIE-PCIX BRIDGE 1PORT 256BGA

PI7C9X130DNDE

Manufacturer Part Number
PI7C9X130DNDE
Description
IC PCIE-PCIX BRIDGE 1PORT 256BGA
Manufacturer
Pericom Semiconductor
Datasheets

Specifications of PI7C9X130DNDE

Applications
PCI-to-PCI Bridge
Interface
SMBus (2-Wire/I²C)
Voltage - Supply
1.8V, 3.3V
Package / Case
256-PBGA
Mounting Type
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C9X130DNDE
Manufacturer:
Pericom
Quantity:
135
Part Number:
PI7C9X130DNDE
Manufacturer:
NSC
Quantity:
70
Part Number:
PI7C9X130DNDE
Manufacturer:
Pericom
Quantity:
10 000
7.4.18 MEMORY BASE REGISTER – OFFSET 20h
7.4.19 MEMORY LIMIT REGISTER – OFFSET 20h
7.4.20 PREFETCHABLE MEMORY BASE REGISTER – OFFSET 24h
PERICOM SEMICONDUCTOR - Confidential
28
29
30
31
Bit
3:0
15:4
Bit
19:16
31:20
Bit
3:0
15:4
Received Target
Abort
Received Master
Abort
Received System
Error
Detected Parity
Error
Function
Reserved
Memory Base
Function
Reserved
Memory Limit
Function
64-bit Addressing
Support
Prefetchable
Memory Base
Type
Type
Type
RWC
RWC
RWC
RWC
RW
RW
RW
RO
RO
RO
Page 45 of 165
FORWARD BRIDGE –
Bit is set when PI7C9X130 detects target abort on the secondary interface
REVERSE BRIDGE –
Bit is set when PI7C9X130 receives a completion with completer abort
completion status on the secondary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X130 detects master abort on the secondary interface
REVERSE BRIDGE –
Bit is set when PI7C9X130 receives a completion with unsupported request
completion status on the primary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X130 detects SERR_L assertion on the secondary
interface
REVERSE BRIDGE –
Bit is set when PI7C9X130 receives an ERR_FATAL or ERR_NON_FATAL
message on the secondary interface
Reset to 0
FORWARD BRIDGE –
Bit is set when PI7C9X130 detects address or data parity error
REVERSE BRIDGE –
Bit is set when PI7C9X130 detects poisoned TLP on secondary interface
Reset to 0
Description
Reset to 0000
Memory Base (80000000h)
Reset to 800h
Description
Reset to 0000
Memory Limit (000FFFFFh)
Reset to 000h
Description
0001: Indicates PI7C9X130 supports 64-bit addressing
Reset to 0001
Prefetchable Memory Base (00000000_80000000h)
Reset to 800h
PCI EXPRESS TO PCI-X BRIDGE
Mar 2010 - Rev 2.0
PI7C9X130

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