TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 282
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TMPM333FDFG
Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Specifications of TMPM333FDFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Company
Part Number
Manufacturer
Quantity
Price
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10.16
Operation in Each Mode
Figure 10-16 Transmit/Receive Operation in the I/O Interface Mode (SCLK Output Mode)
SCLK output
RXD
(INTRXx interrupt request)
SCLK output
RXD
(INTRXx interrupt request)
SCLK output
RXD
(INTRXx interrupt request)
Receive data
read timing
Transmit data
write timing
TXD
(INTTXx interrupt request)
Receive data
read timing
Transmit data
write timing
TXD
(INTTXx interrupt request)
Receive data
read timing
Transmit data
write timing
TXD
(INTTXx interrupt request)
bit 0
bit 0
bit 0
bit 0
bit 0
bit 0
bit 1
bit 1
bit 1
bit 1
bit 1
bit 1
<WBUF> = "0" (if double buffering is disabled)
<WBUF> = "1" (if double buffering is enabled)
<WBUF> = "1" (if double buffering is enabled)
Page 262
bit 5
bit 5
bit 5
bit 5
bit 5
bit 5
bit 6
bit 6
bit 6
bit 6
bit 6
bit 6
bit 7
bit 7
bit 7
bit 7
bit 7
bit 7
TMPM333FDFG/FYFG/FWFG
bit 0
bit 0
bit 0
bit 0
bit 1
bit 1
bit 1
bit 1
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