TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 274

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

10.16
Operation in Each Mode
10.16
10.16.1
10.16.1.1
to accept synchronous clock from an external source.
refer to the previous sections describing receive/transmit FIFO functions.
Operation in Each Mode
Mode 0 consists of two modes, the SCLK output mode to output synchronous clock and the SCLK input mode
The following operational descriptions are for the case use of FIFO is disabled. For details of FIFO operation,
Mode 0 (I/O interface mode)
(1)
Transmitting Data
SCLK Output Mode
・ If the transmit double buffer is disabled (SCxMOD2<WBUF> = "0")
・ If the transmit double buffer is enabled (SCxMOD2<WBUF> = "1")
CPU writes data to the transmit buffer. When all data is output, an interrupt (INTTXx) is
generated.
data to the transmit buffer while data transmission is halted or when data transmission from
the transmit buffer (shift register) is completed. Simultaneously, the transmit buffer empty flag
SCxMOD2<TBEMP> is set to "1", and the INTTXx interrupt is generated.
buffer has no data to be moved to the transmit shift register, INTTXx interrupt is not generated
and the SCLK output stops.
Data is output from the TXD pin and the clock is output from the SCLK pin each time the
Data is moved from the transmit buffer to the transmit shift register when the CPU writes
When data is moved from the transmit buffer to the transmit shift register, if the transmit
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TMPM333FDFG/FYFG/FWFG