TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 213
TMPM333FDFG
Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Specifications of TMPM333FDFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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9.4.8
9.4.9
31-3
2
1
0
31-16
15-0
After reset
After reset
After reset
After reset
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
bit symbol
bit symbol
bit symbol
bit symbol
Bit
Bit
−
TBIMOF
TBIM1
TBIM0
−
TBUC[15:0]
TBxIM(Interrupt mask register)
TBxUC(Up counter capture register)
Bit Symbol
Bit Symbol
31
23
15
31
23
15
0
0
0
7
0
0
0
0
7
0
-
-
-
-
-
-
R
R/W
R/W
R/W
R
R
Type
Type
30
22
14
30
22
14
0
0
0
6
0
0
0
0
6
0
Read as 0.
Overflow interrupt mask
0:Disable
1:Enable
Sets the up-counter overflow interrupt to disable or enable.
Match interrupt mask (TBxRG1)
0:Disable
1:Enable
Sets the match interrupt mask with the Timer register 1 (TBxRG1) to enable or disable.
Match interrupt mask (TBxRG0)
0:Disable
1:Enable
Sets the match interrupt mask with the Timer register 0 (TBxRG0) to enable or disable.
Read as 0.
Captures a value by reading up-counter out.
If TBxUC is read, current up-counter value can be captured.
-
-
-
-
-
-
29
21
13
29
21
13
0
0
0
5
0
0
0
0
5
0
-
-
-
-
-
-
Page 193
28
20
12
28
20
12
0
0
0
4
0
0
0
0
4
0
-
-
-
-
-
-
TBUC
TBUC
27
19
11
27
19
11
Function
Function
0
0
0
3
0
0
0
0
3
0
-
-
-
-
-
-
TBIMOF
26
18
10
26
18
10
0
0
0
2
0
0
0
0
2
0
-
-
-
-
-
TMPM333FDFG/FYFG/FWFG
TBIM1
25
17
25
17
0
0
9
0
1
0
0
0
9
0
1
0
-
-
-
-
-
TBIM0
24
16
24
16
0
0
8
0
0
0
0
0
8
0
0
0
-
-
-
-
-
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