TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 259
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TMPM333FDFG
Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Specifications of TMPM333FDFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Manufacturer
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10.8
10.8.1
10.8.2
10.8.3
Transmit/Receive Buffer and FIFO
on the mode.
SCxMOD2<WBUF>.
or the UART mode is selected, it’s double buffered despite the <WBUF> settings. In other modes, it’s according
to the <WBUF> settings.
Figure 10-3 shows the configuration of transmit buffer, receive buffer and FIFO.
Appropriate settings are required for using buffer and FIFO. The configuration may be predefined depending
Transmit buffer and receive buffer are double-buffered. The buffer configuration is specified by
In the case of using a receive buffer, if SCLK input is set to generate clock output in the I/O interface mode
Table 10-10 shows correlation between modes and buffers.
In addition to the double buffer function above described, 4-byte FIFO can be used.
Configuration
Transmit/Receive Buffer
FIFO
Figure 10-3 The Configuration of Buffer and FIFO
Table 10-10 Mode and buffer Composition
(SCLK output)
(SCLK input)
I/O interface
I/O interface
UART
Mode
Transmit
Transmit
Transmit
Receive
Receive
Receive
Page 239
Double
Double
Single
Single
Single
Single
"0"
SCxMOD2<WBUF>
Double
Double
Double
Double
Double
Double
"1"
TMPM333FDFG/FYFG/FWFG
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