TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 126

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

8.2
Port functions
8.2
8.2.1
Type
Block Diagrams of Ports".
8.2.1.1
8.2.1.2
Port functions
This chapter describes the port registers detail.
This chapter describes only "circuit type" reading circuit configuration.For detailed circuit diagram, refer to "8.3
units of bits. Besides the general-purpose input/output function, the port A performs the debug interface and the
debug trace output.
input, output and pull-up enabled. PA1 is initialized as the TCK/SWCLK pin with input and pull-down enabled.
Pins from PA2 to PA7 operate as general-purpose-ports, and input, output and pull-up are disabled.
Port A data register
Port A output control register
Port A function register 1
Port A pull-up control register
Port A pull-down control register
Port A input control register
Port A (PA0 to PA7)
Note 1: If PA0 is configured as the TMS/SWDIO pin, output is enabled even in STOP mode regardless of the
Note 2: If PA1 is configured as the TCK/SWCLK pin, it prevents the low power consumption mode from being fully effective.
The port A is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can be specified in
PA0 and PA1 are assigned as the debug interface after reset. PA0 is initialized as the TMS/SWDIO pin with
Port A Circuit Type
Port A register
CGSTBYCR<DRVE> bit setting
Configure PA1 to function as a general-purpose port if the TCK/SWCLK is not used.
T1
7
T9
6
Register name
T9
5
Page 106
T9
4
PADATA
PAPUP
PAPDN
PAFR1
PACR
PAIE
T9
3
T9
Base Address = 0x4000_0000
2
TMPM333FDFG/FYFG/FWFG
Address (Base+)
0x002C
0x0000
0x0004
0x0008
0x0030
0x0038
T6
1
T12
0