Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 73

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

58
UM005003-0703
Z8018x
Family MPU User Manual
Lower Limit Address
Lower Limit Address
Common Area 1
•
•
•
CBAR is used to define the logical memory organization, while CBR and
BBR are used to relocate logical areas within the 1024KB physical
address space. The resolution for both setting boundaries within the
logical space and relocation within the physical space is 4KB.
The CA field of CBAR determines the start address of Common Area 1
(Upper Common) and by default, the end address of the Bank Area. The
BA field determines the start address of the Bank Area and by default, the
end address of Common Area 0 (Lower Common).
The CA and BA fields of CBAR may be freely programmed subject only
to the restriction that CA may never be less than BA. Figures 27 and 28
illustrate examples of logical memory organizations associated with
different values of CA and BA.
Figure 27.
Bank Area
Bank Area
Common
Common
Area 1
Area 0
0000H
MMU Common/Bank Area Register (CBAR)
MMU Common Base Register (CBR)
MMU Bank Base Register (BBR)
>
>
Logical Memory Organization
Lower lImit Address
Lower lImit Address
(RESET Condition)
Common Area 1
Bank Area
Bank Area
Common
Area 1
0000H
>
=
Lower Limit Address
Lower Limit Address
Common Area 1
Bank Area
Common
Common
Area 1
Area 0
0000H
=
>
Lower Limit Address
Lower Limit Address
Common Area 1
Bank Area
Common
Area 1
0000H
=
=