Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 166

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

Figure 58.
CSI/O Operation
The CSI/O is operated using status polling or interrupt driven algorithms.
•
•
•
EIE
EF
Transmit–Polling
a. Poll the TE bit in CNTR until TE =
b. Write the transmit data into TRDR.
c. Set the TE bit in CNTR to
d. Repeat steps 1 to 3 for each transmit data byte.
Transmit–Interrupts
a. Poll the TE bit in CNTR until TE =
b. Write the first transmit data byte into TRDR.
c. Set the TE and EIE bits in CNTR to
d. When the transmit interrupt occurs, write the next transmit data
e. Set the TE bit in CNTR to
f.
Receive –Polling
a. Poll the RE bit in CNTR until RE =
b. Set the RE bit in CNTR to
byte into TRDR.
Repeat steps 4 and 5 for each transmit data byte.
CSI/O Interrupt Request Generation
IEF1
1
1
1
.
.
.
Family MPU User Manual
0
0
0
1
.
.
.
.
CSI/O
Interrupt Request
UM005003-0703
Z8018x
151