Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 147

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

132
ASCI Control Register B 0 (CNTLB0: 02H)
ASCI Control Register B 1 (CNTLB1: 03H)
UM005003-0703
Bit
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Position Bit/Field R/W
7
6
Z8018x
Family MPU User Manual
MPBT
MP
MPBT
R/W
7
X
R/W
R/W
R/W
MP
6
0
Value
CTS/PS
R/W
5
0
Description
Multiprocessor Bit Transmit — When multiprocessor
communication format is selected (MP bit is 1), MPBT is
used to specify the MPB data bit for transmission. If
MPBT is 1, then MPB = 1 is transmitted. If MPBT is 0,
then MPBT = 0 is transmitted. MPBT state is undefined
during and after RESET.
Multiprocessor Mode — When MP is set to 1, the data
format is configured for multiprocessor mode based on
the MOD2 (number of data bits) and MOD0 (number of
stop bits) bits in CNTLA. The format is as follows.
Start bit + 7 or 8 data bits + MPB bit + 1 or 2 stop bits
Multiprocessor (MP = 1) format has no provision for
parity. If MP is 0, the data format is based on MOD0
MOD1, MOD2, and may include parity. The MP bit is
cleared to 0 during RESET.
R/W
PE0
4
0
R/W
DR
3
0
R/W
SS2
2
1
R/W
SS1
1
1
R/W
SS0
0
1