Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 31

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

16
UM005003-0703
Z8018x
Family MPU User Manual
WR
Phi
M1
Figure 6.
M1TE (M1 Temporary Enable): This bit controls the temporary assertion
of the M1 signal. It is always read back as a 1 and is set to 1 during
RESET. This function is used to arm the internal interrupt structure of the
Z80PIO. When a control word is written to the Z80PIO to enable
interrupts, no enable actually takes place until the PIO sees an active M1
signal. When M1TE is
signal and M1E controls its function. When M1TE is
asserted during the next Op Code fetch cycle regardless of the state
programmed into the M1E bit. This situation is only momentary (one
time) and the user need not reprogram a
Figure 7).
IOC: This bit controls the timing of the IORQ and RD signals. IOC is set
to
When IOC is
HD64180.
1
by RESET.
T1
Write into OMCR
M1 Temporary Enable Timing
1
, the IORQ and RD signals function the same as the
T2
1
, there is no change in the operation of the M1
T3
1
T1
to disable the function (See
Op Code Fetch
T2
0
, the M1 output is
T3