EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 493

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EP3SE50F780I3N

Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Altera Corporation
October 2007
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Programmable Power Technology
In addition to the ability to change the core voltage, Stratix III also offers
the ability to configure portions of the core, called tiles, for high-speed or
low-power mode of operation performed by the Quartus II software
without user intervention. This programmable power technology, used
to reduce static power, uses an on-chip voltage regulator, powered by
V
whether a tile needs to be in high-speed or low-power mode based on the
timing constraints of the design.
Refer to
about how Quartus II uses programmable power technology when
compiling a design.
A Stratix III tile can consist of the following:
All blocks and routing associated with the tile share the same setting of
either high speed or low power. Tiles that include DSP blocks, memory
blocks, or I/O interfaces are set to high-speed mode by default for
optimum performance when used in the design. Unused DSP blocks,
memory blocks, and I/O elements are set to low-power mode to
minimize static power. Clock networks do not support the
programmable power technology.
With programmable power technology, faster speed grade FPGAs may
require less power, as there will be fewer high-speed MLAB and LAB
pairs, compared to slower speed grade FPGAs. The slower speed grade
device may need to use more high-speed MLAB and LAB pairs to meet
the performance requirements, while the faster speed grade device can
meet the performance requirements with MLAB and LAB pairs in
low-power mode.
Programmable Power and Temperature Sensing Diode in Stratix III Devices
CCPT
MLAB/LAB pairs with routing to the pair
MLAB/LAB pairs with routing to the pair and to adjacent
DSP/memory block routing
TriMatrix memory blocks
DSP blocks
I/O interfaces
. In a design compilation, the Quartus II software determines
AN 437: Power Optimization Techniques
Stratix III Device Handbook, Volume 1
for more information
16–3

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