EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 407

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
When programming a JTAG device chain, one JTAG-compatible header
is connected to several devices. The number of devices in the JTAG chain
is limited only by the drive capability of the download cable. When four
or more devices are connected in a JTAG chain, Altera recommends
buffering the TCK, TDI, and TMS pins with an on-board buffer.
JTAG-chain device programming is ideal when the system contains
multiple devices, or when testing your system using JTAG BST circuitry.
Figure 11–20
nCONFIG
nSTATUS
CONF_DONE
DCLK
Table 11–12. Dedicated Configuration Pin Connections During JTAG
Configuration (Part 2 of 2)
Signal
shows multi-device JTAG configuration.
Driven high by connecting to V
driven high by some control circuitry.
Pull to V
devices in the same JTAG chain, each
pulled up to V
Pull to V
devices in the same JTAG chain, each
pulled up to V
JTAG configuration indicates successful configuration.
Should not be left floating. Drive low or high, whichever is more
convenient on your board.
CC
CC
via a 10-kΩ resistor. When configuring multiple
via a 10-kΩ resistor. When configuring multiple
CC
CC
individually.
individually.
Stratix III Device Handbook, Volume 1
Description
CONF_DONE
CC
Configuring Stratix III Devices
, pulling up via a resistor, or
CONF_DONE
nSTATUS
going high at the end of
pin should be
pin should be
11–47