EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 47
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Figure 2–10. Template for Supported Seven-Input Functions in Extended LUT Mode
Note to
(1)
Altera Corporation
October 2007
If the seven-input function is unregistered, the unused eighth input is available for register packing. The second
register, reg1, is not available.
Figure
datae0
datae1
dataf0
dataf1
dataa
datab
datad
datac
(1)
2–10:
This input is available
for register packing.
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, counters,
accumulators, wide parity functions, and comparators. The ALM in
arithmetic mode uses two sets of 2 four-input LUTs along with two
dedicated full adders. The dedicated adders allow the LUTs to be
available to perform pre-adder logic; therefore, each adder can add the
output of 2 four-input functions.
The four LUTs share the dataa and datab inputs. As shown in
Figure
adder0 feeds to carry-in of adder1. The carry-out from adder1 drives
to adder0 of the next ALM in the LAB. ALMs in arithmetic mode can
drive out registered and/or unregistered versions of the adder outputs.
5-Input
5-Input
LUT
LUT
Logic Array Blocks and Adaptive Logic Modules in Stratix III Devices
2–11, the carry-in signal feeds to adder0, and the carry-out from
combout0
D
Stratix III Device Handbook, Volume 1
reg0
Q
To general or
To general or
local routing
local routing
2–13
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