ATMEGA64A-MNR Atmel, ATMEGA64A-MNR Datasheet - Page 7

• Manufacturer Part Number: ATMEGA64A-MNR
• Description: IC MCU AVR 64K FLASH 8QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64A-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, UART, I2C
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: ATMEGA64A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.3.9
2.3.10
2.3.11
2.3.12
2.3.13
2.3.14
2.3.15
3. Resources
4. Data Retention
8160C–AVR–07/09
Port G (PG4:PG0)
RESET
XTAL1
XTAL2
AVCC
AREF
PEN
Port G is a 5-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port G output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port G pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port G also serves the functions of various special features.
In ATmega103 compatibility mode, these pins only serves as strobes signals to the external
memory as well as input to the 32 kHz Oscillator, and the pins are initialized to PG0 = 1,
PG1 = 1, and PG2 = 0 asynchronously when a reset condition becomes active, even if the clock
is not running. PG3 and PG4 are Oscillator pins.
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
330. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
through a low-pass filter.
AREF is the analog reference pin for the A/D Converter.
This is a programming enable pin for the SPI Serial Programming mode. By holding this pin low
during a Power-on Reset, the device will enter the SPI Serial Programming mode. PEN is inter-
nally pulled high. The pullup is shown in
28.2 “DC Characteristics” on page
A comprehensive set of development tools, application notes and datasheetsare available for
download on http://www.atmel.com/avr.
Note:
Reliability Qualification results show that the projected data retention failure rate is much less
than 1 PPM over 20 years at 85°C or 100 years at 25°C.
1.
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
327. PEN has no function during normal operation.
Figure 10-1 on page 52
and its value is given in
ATmega64A
Table 28-3 on page
Section
CC
7