ATMEGA64A-MNR Atmel, ATMEGA64A-MNR Datasheet - Page 266

• Manufacturer Part Number: ATMEGA64A-MNR
• Description: IC MCU AVR 64K FLASH 8QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64A-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, UART, I2C
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: ATMEGA64A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.5.4
8160C–AVR–07/09
Scanning the Clock Pins
The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-
tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 25-7
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/clock out-
put is attached to an observe-only cell. In addition to the main clock, the timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
Figure 25-7. Boundary-scan Cells for Oscillators and Clock Options
Table 25-3
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 25-3.
Note:
Enable Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
Previous
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse does not change run-time, the
From
Cell
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
clock configuration is considered fixed for a given application. The user is advised to scan the
ShiftDR
shows how each Oscillator with external connection is supported in the scan chain.
summaries the scan registers for the external clock pin XTAL1, oscillators with
0
1
Scan Signals for the Oscillators
ClockDR
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TOSCK
D
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
Clock Option
External Clock
External Crystal
External Ceramic Resonator
External RC
Low Freq. External Crystal
32 kHz Timer Oscillator
XTAL1/TOSC1
ENABLE
(1)(2)(3)
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
0
1
ATmega64A
ClockDR
Scanned Clock Line
when Not Used
D
FF1
Q
0
0
0
1
0
Next
Cell
To
266