ATMEGA64A-MNR Atmel, ATMEGA64A-MNR Datasheet - Page 297

• Manufacturer Part Number: ATMEGA64A-MNR
• Description: IC MCU AVR 64K FLASH 8QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64A-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, UART, I2C
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: ATMEGA64A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.2.1
8160C–AVR–07/09
Latching of Fuses
Table 27-4.
Note:
Table 27-5.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters Programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
OCDEN
JTAGEN
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
BODLEVEL
BODEN
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Fuse High Byte
Fuse Low Byte
(1)
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See
3. The default value of BOOTSZ1:0 results in maximum Boot Size. See
4. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1:0 results in maximum start-up time. See
2. The default setting of CKSEL3:0 results in internal RC Oscillator @ 1 MHz. See
(2)
(4)
Sources” on page 38
to avoid static current at the TDO pin in the JTAG interface
details.
page 38
Fuse High Byte
Fuse Low Byte
for details.
Bit no
Bit no
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Brown out detector trigger level
Brown out detector enable
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Description
Enable OCD
Enable JTAG
Enable SPI Serial Program and Data
Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
details)
Select Boot Size (see
details)
Select Reset Vector
for details.
Table 26-6
Table 26-6
for
for
Default Value
1 (unprogrammed)
1 (unprogrammed, BOD disabled)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM
not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Table 8-8 on page 42
ATmega64A
Table 26-6 on page 292
(1)
(2)
(2)
(2)
(1)
(2)
(3)
(3)
“Clock
Table 8-1 on
for
297