MCF5282CVM80 Freescale Semiconductor, MCF5282CVM80 Datasheet - Page 763

• Manufacturer Part Number: MCF5282CVM80
• Description: IC MPU 512K 80MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVM80

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Controller Family/series: ColdFire
• Ram Memory Size: 64KB
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of Pwm Channels: 8
• Digital Ic Case Style: MAPBGA
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timing diagrams
Transmit bit error (BITERR) 25-26
U
UART modules
Freescale Semiconductor
watchdog, see watchdog timer 18-2
debug
Ethernet
general input timing requirements 33-12
GPIO 33-19
I
JTAG
QADC
QSPI timing 33-25
reset controller
SDRAM controller
SRAM
clock select registers (UCSRn) 23-9
clock source
command registers (UCRn) 23-9
core interrupts 23-26
DMA service 23-27
2
C
registers
timeout 19-7
BDM serial port AC timing 33-28
real-time trace AC timing 33-28
MII async input signal 33-23
digital input 26-28
digital output 26-28
input/output timing 33-21
BKPT timing 33-27
boundary scan 33-26
test access port 33-26
test clock input timing 33-26
TRST timing 33-27
bypass mode conversion timing 28-33
conversion in external positive edge trigger mode 28-59
conversion in gated mode, continuous scan 28-60
conversion in gated mode, single scan 28-60
conversion timing 28-33
RSTI and configuration override timing 33-20
read cycle 33-17
write cycle 33-18
bus cycle terminated by TA 33-15
bus cycle terminated by TEA 33-16
baud rates 23-17
divider 23-17
external 23-18
set-and-forget 19-6
control and status (PCSR) 19-3
count (PCNTR) 19-5
modulus (PMR) 19-5
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
V
Variant address 30-4
W
Wait mode 7-6
Wake interrupt (WAKEINT) 25-16
Watchdog timer
WDDATA execution 30-3
FIFO stack 23-21
initialization 23-29
input port change (UIPCRn) 23-12
memory map 23-3
operation
registers
block diagram 18-2
memory map 18-2
operation
overview 18-1
registers
looping modes
low-power modes 7-8
multidrop mode 23-24
receiver 23-20
transmitter 23-18
auxiliary control (UACRn) 23-13
baud rate generator (UBG1n/UBG2n) 23-15
input port (UIPn) 23-15
interrupt status/mask (UISRn/UIMRn) 23-13
mode 1 (UMR1n) 23-5
mode 2 (UMR2n) 23-6
output port command (UOP1n/UOP0n) 23-16
receive buffers (URBn) 23-11
status (USRn) 23-8
transmit buffers (UTBn) 23-12
low-power 7-10
control (WCR) 18-3
count (WCNTR) 18-5
modulus (WMR) 18-4
service (WSR) 18-5
automatic echo 23-23
local loop-back 23-23
remote loop-back 23-23
,
18-1
,
25-27
Index-15