MCF5282CVM80 Freescale Semiconductor, MCF5282CVM80 Datasheet - Page 263

IC MPU 512K 80MHZ 256-MAPBGA

MCF5282CVM80

Manufacturer Part Number
MCF5282CVM80
Description
IC MPU 512K 80MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVM80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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14.2.5
14.2.5.1 External Interrupts (IRQ[7:1])
These inputs are the external interrupt sources. See
information on these interrupt sources and their corresponding registers.
These pins are configured as GPIO PNQ[7:1] in single-chip mode.
14.2.6
The following signals are used by the Ethernet module for data and clock signals.
14.2.6.1 Management Data (EMDIO)
The bidirectional EMDIO signal transfers control information between the external PHY and the
media-access controller. Data is synchronous to EMDC and applies to MII mode operation. This signal is
an input after reset. When the FEC is operated in 10 Mbps 7-wire interface mode, this signal should be
connected to VSS.
This pin can also be configured as GPIO PAS5 or URXD2.
14.2.6.2 Management Data Clock (EMDC)
EMDC is an output clock which provides a timing reference to the PHY for data transfers on the EMDIO
signal and applies to MII mode operation.
This pin can also be configured as GPIO PAS4 or UTXD2.
14.2.6.3 Transmit Clock (ETXCLK)
This is an input clock which provides a timing reference for ETXEN, ETXD[3:0] and ETXER.
This pin can also be configured as GPIO PEH7.
14.2.6.4 Transmit Enable (ETXEN)
The transmit enable (ETXEN) output indicates when valid nibbles are present on the MII. This signal is
asserted with the first nibble of a preamble and is negated before the first ETXCLK following the final
nibble of the frame.
This pin can also be configured as GPIO PEH6.
14.2.6.5 Transmit Data 0 (ETXD0)
ETXD0 is the serial output Ethernet data and is only valid during the assertion of ETXEN. This signal is
used for 10 Mbps Ethernet data. This signal is also used for MII mode data in conjunction with ETXD[3:1].
This pin can also be configured as GPIO PEH5.
Freescale Semiconductor
External Interrupt Signals
Ethernet Module Signals
These signals are not available on the MCF5214 and MCF5216.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
NOTE
Chapter 11, “Edge Port Module
(EPORT)” for more
Signal Descriptions
14-23

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