MCF5282CVM80 Freescale Semiconductor, MCF5282CVM80 Datasheet - Page 670

IC MPU 512K 80MHZ 256-MAPBGA

MCF5282CVM80

Manufacturer Part Number
MCF5282CVM80
Description
IC MPU 512K 80MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF528xr
Datasheet

Specifications of MCF5282CVM80

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
150
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Digital Ic Case Style
MAPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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IEEE 1149.1 Test Access Port (JTAG)
31.5.2
The TAP controller is a state machine that changes state based on the sequence of logical values on the
TMS pin.
TMS signal sampled on the rising edge of the TCLK signal.
Asserting the TRST signal asynchronously resets the TAP controller to the test-logic-reset state. As
Figure 31-3
causes the state machine to enter the test-logic-reset state, whatever the initial state.
31.5.3
Table 31-5
31-6
1
0
TEST-LOGIC-RESET
Figure 31-3
RUN-TEST/IDLE
TAP Controller
JTAG Instructions
describes public and private instructions.
shows, holding TMS at logic 1 while clocking TCLK through at least five rising edges also
0
shows the machine’s states. The value shown next to each state is the value of the
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
1
Figure 31-3. TAP Controller State Machine Flow
1
0
SELECT DR-SCAN
CAPTURE-DR
UPDATE-DR
PAUSE-DR
SHIFT-DR
EXIT1-DR
EXIT2-DR
1
0
0
0
1
1
1
1
0
1
1
0
0
1
0
SELECT IR-SCAN
CAPTURE-IR
UPDATE-IR
PAUSE-IR
SHIFT-IR
EXIT1-IR
EXIT2-IR
1
Freescale Semiconductor
0
0
1
0
1
1
0
1
1
0
0

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