PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 90

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
FIGURE 8-2:
TABLE 8-1:
TABLE 8-2:
DS30475A-page 90
RA0/AN0
RA1/AN1
RA2/AN2/V
RA3/AN3/V
RA4/T0CKI
RA5/SS/AN4/LVDIN
OSC2/CLKO/RA6
Legend: TTL = TTL input, ST = Schmitt Trigger input, OD = Open Drain
PORTA
LATA
TRISA
ADCON1
Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'.
WR TRISA
WR LATA
or
WR PORTA
Note 1: I/O pin has diode protection to V
Name
Data
Bus
RD PORTA
TMR0 Clock Input
Name
Shaded cells are not used by PORTA.
REF
REF
Bit 7
—
—
—
—
-
+
TRIS Latch
Data Latch
D
D
RA4/T0CKI PIN BLOCK
DIAGRAM
CK
CK
PORTA FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
RD LATA
RD TRISA
Latch A Data Output Register
PORTA Data Direction Register
Bit 6
RA6
Q
Q
Q
Q
—
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
Q
VCFG1 VCFG0 PCFG3
Bit 5
RA5
EN
Schmitt
Trigger
Input
Buffer
SS
TTL
TTL
TTL
TTL
ST/OD
TTL
TTL
EN
Buffer
D
only.
V
N
SS
Bit 4
RA4
Advanced Information
Input/output or analog input or V
Input/output or analog input or V
input, or low voltage detect input.
Input/output or analog input.
Input/output or analog input.
Input/output or external clock input for Timer0 output is open drain type.
Input/output or slave select input for synchronous serial port or analog
OSC2 or clock output or I/O pin.
I/O Pin
Bit 3
RA3
(1)
PCFG2
Bit 2
RA2
FIGURE 8-3:
WR LATA
or
WR PORTA
WR
TRISA
Data
Bus
Note 1:
Data Bus
Data Bus
RD PORTA
ECRA6 or
RCRA6 Enable
PCFG1
Bit 1
RA1
RD TRISA
TRIS Latch
I/O pins have diode protection to V
Data Latch
D
D
CK
CK
Function
RD LATA
REF
REF
PCFG0 --00 0000 --uu uuuu
-.
+.
RA6 BLOCK DIAGRAM
Q
Q
Q
Q
Bit 0
RA0
 2000 Microchip Technology Inc.
-x0x 0000 -uuu uuuu
-xxx xxxx -uuu uuuu
-111 1111 -111 1111
ECRA6 or
RCRA6
Enable
Value on
POR,
BOR
Q
DD
V
V
P
N
EN
SS
DD
and V
D
Value on all
RESETS
other
SS
I/O Pin
TTL
Input
Buffer
.
(1)