PIC18C858-E/L Microchip Technology, PIC18C858-E/L Datasheet - Page 154

• Manufacturer Part Number: PIC18C858-E/L
• Description: IC MCU OTP 16KX16 CAN 84PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C858-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 84-PLCC
• For Use With: AC164310 - MODULE SKT FOR PM3 84PLCCDVA18XL840 - ADAPTER DEVICE ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC18C858E/L

PIC18CXX8
15.4.6
To initiate a START condition, the user sets the START
Condition Enable (SEN) bit (SSPCON2 register). If the
SDA and SCL pins are sampled high, the baud rate
generator
SSPADD<6:0> and starts its count. If SCL and SDA are
both sampled high when the baud rate generator times
out (T
SDA being driven low, while SCL is high, is the START
condition, and causes the S bit (SSPSTAT register) to
be set. Following this, the baud rate generator is
reloaded with the contents of SSPADD<6:0> and
resumes its count. When the baud rate generator times
out (T
automatically cleared by hardware, the baud rate gen-
erator is suspended leaving the SDA line held low and
the START condition is complete.
FIGURE 15-13: FIRST START BIT TIMING
DS30475A-page 154
Note:
BRG
BRG
I
TIMING
2
), the SDA pin is driven low. The action of the
), the SEN bit (SSPCON2 register) will be
C MASTER MODE START CONDITION
If at the beginning of the START condition,
the SDA and SCL pins are already sam-
pled low, or if during the START condition
the SCL line is sampled low before the SDA
line is driven low, a bus collision occurs, the
Bus Collision Interrupt Flag BCLIF is set,
the START condition is aborted, and the
I
2
is
C module is reset into its IDLE state.
re-loaded
Write to SEN bit occurs here
with
SDA
SCL
the
contents
Advanced Information
SDA = 1,
SCL = 1
T
BRG
of
Set S bit (SSPSTAT)
T
S
BRG
At completion of START bit,
Hardware clears SEN bit
15.4.6.1
If the user writes the SSPBUF when a START
sequence is in progress, the WCOL is set and the con-
tents of the buffer are unchanged (the write doesn’t
occur).
and sets SSPIF bit
Note:
T
Write to SSPBUF occurs here
BRG
1st Bit
WCOL Status Flag
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the START
condition is complete.
T
BRG
 2000 Microchip Technology Inc.
2nd Bit